 Yannick Reiß
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8d340be824
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Presentable program
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2023-10-05 15:43:55 +02:00 |
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Yannick Reiß
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bbd5a5efda
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Implement FPGA as target device into compiler
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2023-10-05 14:20:10 +02:00 |
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Yannick Reiß
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a4d8ea1374
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FPGA is new default device, fuck bf to c compiling
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2023-10-05 12:52:39 +02:00 |
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Yannick Reiß
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8da2a2b27e
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Addition to proof of correctness
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2023-10-04 10:06:58 +02:00 |
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Yannick Reiß
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ba7f2d8394
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Prevent null arguments through command line
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2023-09-26 07:33:09 +02:00 |
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Yannick Reiß
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09183f43e1
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minor changes for memory safety.
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2023-09-23 16:10:01 +02:00 |
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Yannick Reiß
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2f3cc97163
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remove debug output
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2023-09-22 15:17:05 +02:00 |
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Yannick Reiß
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09dce9f92c
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Add assembling to build process
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2023-09-22 15:12:36 +02:00 |
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Yannick Reiß
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451c6406c2
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Add functions to compile programs for logisim
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2023-09-22 15:12:17 +02:00 |
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Yannick Reiß
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f329bd0770
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Call analyse function from compiler
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2023-09-21 15:10:36 +02:00 |
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Yannick Reiß
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96a5f3cda6
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Implement analyse function
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2023-09-21 15:09:27 +02:00 |
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Yannick Reiß
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1b517751f9
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Implement read file and extract tokens.
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2023-09-21 07:47:19 +02:00 |
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Yannick Reiß
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3a9ec5ecfe
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Sceleton
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2023-09-20 19:39:31 +02:00 |