4 Commits

Author	SHA1	Message	Date
Yannick Reiß	75e722b222	Implement ALU	2023-09-26 11:34:53 +02:00
Yannick Reiß	a94cf440c1	Add constraints for stage 1	2023-09-26 11:34:40 +02:00
Yannick Reiß	a8d8a4171a	Add constraints file	2023-09-26 07:27:03 +02:00
Yannick Reiß	b02be01de1	Add files for fpga	2023-09-26 07:26:17 +02:00