diff --git a/UltiSnips/verilog.snippets b/UltiSnips/verilog.snippets
index 677fd39..e7751a8 100644
--- a/UltiSnips/verilog.snippets
+++ b/UltiSnips/verilog.snippets
@@ -42,3 +42,15 @@ endsnippet
 snippet ,double "set bus to size of a double word" A
 [63:0]$0
 endsnippet
+
+snippet begin "begin - end" iA
+begin
+	$1
+end
+$0
+endsnippet
+
+snippet def "Definition/Constant" b
+\`define ${1:NAME} ${2:VALUE}
+$0
+endsnippet
diff --git a/spell/de.utf-8.add b/spell/de.utf-8.add
new file mode 100644
index 0000000..1316625
--- /dev/null
+++ b/spell/de.utf-8.add
@@ -0,0 +1,2 @@
+transgender
+python
diff --git a/spell/de.utf-8.add.spl b/spell/de.utf-8.add.spl
new file mode 100644
index 0000000..85b36cb
Binary files /dev/null and b/spell/de.utf-8.add.spl differ
diff --git a/spell/en.utf-8.add b/spell/en.utf-8.add
new file mode 100644
index 0000000..e9c37cf
--- /dev/null
+++ b/spell/en.utf-8.add
@@ -0,0 +1 @@
+t0
diff --git a/spell/en.utf-8.add.spl b/spell/en.utf-8.add.spl
new file mode 100644
index 0000000..441fcb0
Binary files /dev/null and b/spell/en.utf-8.add.spl differ