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tt06_lights_out
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Wrong top module name in tet

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Yannick Reiß 2024-03-18 11:07:54 +01:00
parent fa728e5d53
commit 814f78a122
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1 changed files with 1 additions and 1 deletions
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test/tb.v
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@ -23,7 +23,7 @@ module tb ();
wire [7:0] uio_oe; wire [7:0] uio_oe;
// Replace tt_um_example with your module name: // Replace tt_um_example with your module name:
tt_um_lights_out user_project ( tt_um_yannickreiss_lights_out user_project (
// Include power ports for the Gate Level test: // Include power ports for the Gate Level test:
`ifdef GL_TEST `ifdef GL_TEST